Invention Grant
- Patent Title: Semiconductor structure and method of forming a harmonic-effect-suppression structure
- Patent Title (中): 形成谐波抑制结构的半导体结构和方法
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Application No.: US13932009Application Date: 2013-07-01
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Publication No.: US09048285B2Publication Date: 2015-06-02
- Inventor: Tong-Yu Chen , Kuo-Yuh Yang
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L29/06 ; H01L21/768

Abstract:
A semiconductor structure includes a SOI/BOX semiconductor substrate, a device, a deep trench, a silicon layer, and a dielectric layer. The deep trench is adjacent to the device and extends through a shallow trench isolation layer within the SOI layer and the BOX layer and into the base semiconductor substrate. The silicon layer is disposed within a lower portion of the deep trench. The silicon layer has a top surface height substantially the same as or lower than a top surface height of the base semiconductor substrate. The dielectric layer is disposed within the deep trench and on the silicon layer. The deep trench can be formed before or after formation of an interlayer dielectric.
Public/Granted literature
- US20150001670A1 Semiconductor structure and method of forming a harmonic-effect-suppression structure Public/Granted day:2015-01-01
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