Invention Grant
- Patent Title: Semiconductor device and method of manufacturing semiconductor device
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US14196449Application Date: 2014-03-04
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Publication No.: US09048304B2Publication Date: 2015-06-02
- Inventor: Hidetoshi Fujimoto
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku, Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku, Tokyo
- Agency: White & Case LLP
- Priority: JP2013-162541 20130805
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/778 ; H01L29/20 ; H01L21/02 ; H01L29/66

Abstract:
In a semiconductor device, a first-layer includes a group-III nitride semiconductor of a first conduction type. A second-layer includes a group-III nitride semiconductor of a second conduction type on a first surface of the first layer. A third-layer includes an Al-containing group-III nitride semiconductor on a first region of a surface of the second layer. A gate electrode has one end above a surface of the third-layer and has the other end within the first-layer via the second-layer. The gate electrode is insulated from the first- to third-layers. A first electrode is connected to the third-layer. A second electrode is connected to a second region of the surface of the second-layer. A third electrode is provided above a second surface of the first layer. The second surface is opposite to the first surface of the first layer.
Public/Granted literature
- US20150034904A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2015-02-05
Information query
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