Invention Grant
- Patent Title: Semiconductor device having plural memory cells with cavities formed therein, and method of manufacturing the same
- Patent Title (中): 具有形成有空腔的多个存储单元的半导体装置及其制造方法
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Application No.: US13736273Application Date: 2013-01-08
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Publication No.: US09048328B2Publication Date: 2015-06-02
- Inventor: Hideto Takekida
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Tokyo
- Agency: Holtz, Holtz, Goodman & Chick PC
- Priority: JP2012-003013 20120111
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L27/06 ; H01L29/66 ; H01L27/115 ; H01L21/28 ; H01L49/02 ; H01L29/51 ; H01L29/423
Abstract:
A semiconductor device includes, a semiconductor substrate, a plurality of memory cells being provided on the semiconductor substrate in a memory cell region. Each of the plurality of memory cells having a first gate electrode disposed on the semiconductor substrate with a first gate insulating film, and the first gate electrode having a first charge storage layer, a first inter-electrode insulating film and a first control gate electrode film, and a cavity is interposed between an upper surface of the charge storage layer and the inter-electrode insulating film.
Public/Granted literature
- US20130175592A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2013-07-11
Information query
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