Invention Grant
- Patent Title: Integrated circuit memory devices having vertical transistor arrays therein and methods of forming same
- Patent Title (中): 具有垂直晶体管阵列的集成电路存储器件及其形成方法
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Application No.: US14024737Application Date: 2013-09-12
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Publication No.: US09048329B2Publication Date: 2015-06-02
- Inventor: Ji-Young Kim , Kang L. Wang , Yong-Jik Park , Jeong-Hee Han , Augustin Jinwoo Hong
- Applicant: Ji-Young Kim , Kang L. Wang , Yong-Jik Park , Jeong-Hee Han , Augustin Jinwoo Hong
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, PA
- Priority: KR10-2009-0121107 20091208
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L27/115

Abstract:
An integrated circuit device includes a transistor array having a vertical stack of independently controllable gate electrodes therein. A first semiconductor channel region is provided, which extends on a first sidewall of the vertical stack of independently controllable gate electrodes. A first electrically insulating layer is also provided, which extends between the first semiconductor channel region and the first sidewall of the vertical stack of independently controllable gate electrodes. Source and drain regions are provided, which are electrically coupled to first and second ends of the first semiconductor channel region, respectively.
Public/Granted literature
- US20140015032A1 INTEGRATED CIRCUIT MEMORY DEVICES HAVING VERTICAL TRANSISTOR ARRAYS THEREIN AND METHODS OF FORMING SAME Public/Granted day:2014-01-16
Information query
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