Invention Grant
- Patent Title: Semiconductor device manufacturing method and semiconductor mounting substrate
- Patent Title (中): 半导体器件制造方法和半导体安装基板
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Application No.: US14134289Application Date: 2013-12-19
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Publication No.: US09048332B2Publication Date: 2015-06-02
- Inventor: Mamoru Kurashina , Daisuke Mizutani
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Kratz, Quintos & Hanson, LLP
- Priority: JP2013-054525 20130318
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H05K1/11 ; H01L23/00 ; H01L21/768 ; H01L23/498 ; H01L21/48
Abstract:
A semiconductor device manufacturing method includes: a first-process for placing, on a first-substrate on which traces and first-electrodes are formed, each of the first-electrodes being connected to one of traces, a second-substrate in which through-holes corresponding to the first-electrodes and relay-members are disposed, each of the relay-members being formed of solder, penetrating through one of the through-holes, and projecting from both ends of the one of the through-holes, so that the first-electrodes are aligned with the through-holes in a plan view; a second-process for melting the relay-members so that the relay-members are connected to the first-electrodes, after the first-process; and a third-process for placing a semiconductor substrate on which a second-electrodes corresponding to the first-electrodes are formed on a side opposite to the first-substrate across the second-substrate, after the second-process, to connect the first-electrodes and the second-electrodes to each other via the relay-members.
Public/Granted literature
- US20140264935A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR MOUNTING SUBSTRATE Public/Granted day:2014-09-18
Information query
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