Invention Grant
US09048337B2 Vertical transistor, memory cell, device, system and method of forming same
有权
垂直晶体管,存储单元,器件,系统及其形成方法
- Patent Title: Vertical transistor, memory cell, device, system and method of forming same
- Patent Title (中): 垂直晶体管,存储单元,器件,系统及其形成方法
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Application No.: US13908473Application Date: 2013-06-03
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Publication No.: US09048337B2Publication Date: 2015-06-02
- Inventor: Leonard Forbes
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L27/108 ; H01L29/94 ; H01L21/8239 ; G11C11/404 ; G11C11/408 ; H01L29/66 ; H01L29/78 ; G11C11/407 ; H01L27/105

Abstract:
A memory device, system and fabrication method relating to a vertical memory cell including a semiconducting pillar extending outwardly from an integrally connected semiconductor substrate are disclosed. A first source/drain region is formed in the semiconductor substrate and a body region and a second source/drain region are formed within the semiconductor pillar. A first gate is coupled to a first side of the semiconductor pillar for coupling the first and second source/drain regions together when activated. The vertical memory cell also includes a storage capacitor formed on an extended end of the semiconducting pillar and electrically coupled to the second source/drain region.
Public/Granted literature
- US20130258756A1 VERTICAL TRANSISTOR, MEMORY CELL, DEVICE, SYSTEM AND METHOD OF FORMING SAME Public/Granted day:2013-10-03
Information query
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