Invention Grant
- Patent Title: Logical packet processing pipeline that retains state information to effectuate efficient processing of packets
- Patent Title (中): 逻辑分组处理流水线保留状态信息以实现分组的高效处理
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Application No.: US13218464Application Date: 2011-08-26
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Publication No.: US09049153B2Publication Date: 2015-06-02
- Inventor: Martin Casado , Teemu Koponen , Pankaj Thakkar
- Applicant: Martin Casado , Teemu Koponen , Pankaj Thakkar
- Applicant Address: US CA Palo Alto
- Assignee: NICIRA, INC.
- Current Assignee: NICIRA, INC.
- Current Assignee Address: US CA Palo Alto
- Agency: Adeli LLP
- Main IPC: H04L12/26
- IPC: H04L12/26 ; H04L12/54 ; G06F9/38 ; G06F15/16 ; H04L12/931 ; H04L12/933 ; H04L12/713 ; H04L12/24 ; H04L12/935 ; G06F15/173 ; G06F11/07
Abstract:
Some embodiments provide a method of processing a packet through a logical switching element implemented by several managed switching elements. The method receives a packet for processing through a processing pipeline of the logical switching element. The method processes the packet through the processing pipeline. The method stores state information in the packet for indicating that the packet has been processed through the processing pipeline in order to prevent other managed switching elements from processing the packet through the processing pipeline. The method forwards the processed packet to a managed switching element of the several managed switching elements.
Public/Granted literature
Information query
