Invention Grant
- Patent Title: Terminations and couplings between chips and substrates
- Patent Title (中): 芯片和基板之间的端接和耦合
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Application No.: US13912652Application Date: 2013-06-07
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Publication No.: US09049791B2Publication Date: 2015-06-02
- Inventor: Dror Hurwitz , Alex Huang
- Applicant: Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd.
- Applicant Address: CN Zhuhai
- Assignee: Zhuhai Advanced Chip Carriers & Electronic Substrates Solutions Technologies Co. Ltd.
- Current Assignee: Zhuhai Advanced Chip Carriers & Electronic Substrates Solutions Technologies Co. Ltd.
- Current Assignee Address: CN Zhuhai
- Agency: Wiggin and Dana LLP
- Agent Gregory S. Rosenblatt; Jonathan D. Hall
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H05K1/02 ; H01L23/00 ; H05K1/11 ; H05K3/00

Abstract:
A method of attaching a chip to the substrate with an outer layer consisting of via pillars embedded in a dielectric such as solder mask, with ends of the via pillars flush with said dielectric, the method consisting of optionally removing an organic varnish, positioning a chip having legs terminated with solder bumps in contact with exposed ends of the via pillars, and applying heat to melt the solder bumps and to wet the ends of the vias with solder.
Public/Granted literature
- US20140363927A1 Novel Terminations and Couplings Between Chips and Substrates Public/Granted day:2014-12-11
Information query
IPC分类: