Invention Grant
- Patent Title: Memory system
- Patent Title (中): 内存系统
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Application No.: US14300784Application Date: 2014-06-10
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Publication No.: US09053016B2Publication Date: 2015-06-09
- Inventor: Shinken Okamoto
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-027944 20100210
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G06F12/02

Abstract:
According to the embodiments, a memory system includes a nonvolatile semiconductor memory and a writing-loop-count monitoring unit that monitors a loop count of an applied voltage to the nonvolatile semiconductor memory required for data writing of the nonvolatile semiconductor memory as a writing loop count. Moreover, the memory system includes a management table for managing the writing loop count in block unit that is a unit of data erasing and a life managing unit that determines a degraded state of the nonvolatile semiconductor memory based on the management table.
Public/Granted literature
- US20140297930A1 MEMORY SYSTEM Public/Granted day:2014-10-02
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