Invention Grant
US09053036B2 System and method for providing a flash memory cache input/output throttling mechanism based upon temperature parameters for promoting improved flash life
有权
用于提供基于温度参数的闪存缓存输入/输出节流机构的系统和方法，用于促进改善的闪光寿命
- Patent Title: System and method for providing a flash memory cache input/output throttling mechanism based upon temperature parameters for promoting improved flash life
- Patent Title (中): 用于提供基于温度参数的闪存缓存输入/输出节流机构的系统和方法，用于促进改善的闪光寿命
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Application No.: US13684838Application Date: 2012-11-26
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Publication No.: US09053036B2Publication Date: 2015-06-09
- Inventor: Ashish Jain , Kiran B. Dalvi , Amit K. Sharma
- Applicant: LSI Corporation
- Applicant Address: SG Singapore
- Assignee: Avago Technologies General IP (Singapore) Pte Ltd
- Current Assignee: Avago Technologies General IP (Singapore) Pte Ltd
- Current Assignee Address: SG Singapore
- Agency: Duft Bornsen & Fettig
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F11/00 ; G06F13/16 ; G06F12/02
Abstract:
Aspects of the disclosure pertain to a system and method for providing a flash memory cache input/output throttling mechanism based upon temperature parameters for promoting improved flash life. The mechanism restricts flash memory cache caching of inputs/outputs associated with Least Recently Used data and Most Recently Used data when a temperature of the flash memory is at or above a threshold temperature.
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