Invention Grant
US09053066B2 NAND flash memory interface 有权
NAND闪存接口

NAND flash memory interface
Abstract:
A NAND flash memory chip has a configurable interface that can communicate with a NAND flash memory controller using either parallel communication or serial communication. Serial communication requires fewer channels. Control information from the NAND flash memory controller uses a small number of channels. Double Data Rate (DDR) communication provides serial communication with adequate data transfer speed.
Public/Granted literature
Information query
Patent Agency Ranking
0/0