Invention Grant
- Patent Title: Method and system for overlay control
- Patent Title (中): 覆盖控制方法和系统
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Application No.: US14017793Application Date: 2013-09-04
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Publication No.: US09053284B2Publication Date: 2015-06-09
- Inventor: Yang-Hung Chang , Kai-Hsiung Chen , Chih-Ming Ke
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F9/00 ; G03F1/00 ; G21K5/00 ; G01R31/26 ; G01L21/00 ; G01P21/00 ; G01N37/00 ; H01L21/00 ; G06F19/00

Abstract:
A method for overlay monitoring and control is introduced in the present disclosure. The method comprises forming resist patterns on one or more wafers in a lot by an exposing tool; selecting a group of patterned wafers in the lot using a wafer selection model; selecting a group of fields for each of the selected group of patterned wafers using a field selection model; selecting at least one point in each of the selected group of fields using a point selection model; measuring overlay errors of the selected at least one point on a selected wafer; forming an overlay correction map using the measured overlay errors on the selected wafer; and generating a combined overlay correction map using the overlay correction map of each selected wafer in the lot.
Public/Granted literature
- US20150067617A1 Method and System for Overlay Control Public/Granted day:2015-03-05
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