Invention Grant
US09053761B2 Circuit and method for improving sense amplifier reaction time in memory read operations
有权
用于在存储器读取操作中改善读出放大器反应时间的电路和方法
- Patent Title: Circuit and method for improving sense amplifier reaction time in memory read operations
- Patent Title (中): 用于在存储器读取操作中改善读出放大器反应时间的电路和方法
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Application No.: US13671147Application Date: 2012-11-07
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Publication No.: US09053761B2Publication Date: 2015-06-09
- Inventor: Rajiv Roy
- Applicant: LSI Corporation
- Applicant Address: SG Singapore
- Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Sheridan Ross P.C.
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C7/08 ; G11C11/419 ; G11C7/06

Abstract:
A sense amplifier circuit, a method of modifying a differential voltage in a sense amplifier circuit and a memory system incorporating the sense amplifier circuit or the method are described. The sense amplifier circuit is described to include: (1) a differential amplifier having first and second inputs respectively couplable to first and second complimentary bit lines and configured to receive a differential voltage therefrom representing a current logic value to be read and (2) a sense speed alteration circuit having first and second outputs respectively coupled to the first and second inputs via respective first and second capacitors and configured to cause one of the first and second capacitors to discharge to increase the differential voltage when a previously read logic value is opposite the current logic value to be read.
Public/Granted literature
- US20140126315A1 CIRCUIT AND METHOD FOR IMPROVING SENSE AMPLIFIER REACTION TIME IN MEMORY READ OPERATIONS Public/Granted day:2014-05-08
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