A semiconductor device includes a memory cell array including a vertical channel layer, two or more selection transistors, and a plurality of memory cells formed along the vertical channel; a peripheral circuit suitable for programming the two or more selection transistors and the memory cells; and a control circuit suitable for controlling the peripheral circuit to decrease a pass voltage applied to one word line adjacent to two or more selection lines coupled to the respective selection transistors, during a program operation in which the peripheral circuit applies a program voltage to the two or more selection lines and applies the pass voltage to a plurality of word lines connected to the memory cells.