A semiconductor memory device includes a plurality of memory cells, a plurality of bit lines, each of which is electrically connected to a string of the memory cells, and a sense module provided for each of the bit lines. Each sense module includes a sense transistor that is configured to turn on and off to indicate whether or not data is stored in a memory cell that is targeted by a reading operation, the sense transistor having a threshold voltage level and a gate that is connected to a sense node, the sense node being connected to a discharge line through a series of transistors including the sense transistor so that prior to a sensing operation the sense node can be discharged to a level that is set in accordance with a threshold voltage thereof.