Invention Grant
US09053953B1 Integrated circuit packaging system with underfill and method of manufacture thereof
有权
具有底部填充的集成电路封装系统及其制造方法
- Patent Title: Integrated circuit packaging system with underfill and method of manufacture thereof
- Patent Title (中): 具有底部填充的集成电路封装系统及其制造方法
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Application No.: US13842305Application Date: 2013-03-15
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Publication No.: US09053953B1Publication Date: 2015-06-09
- Inventor: KyungHoon Lee , DaeWook Yang , SunMi Kim
- Applicant: KyungHoon Lee , DaeWook Yang , SunMi Kim
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/50 ; H01L23/02 ; H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L25/065 ; H01L25/00

Abstract:
An integrated circuit packaging system, and a method of manufacture thereof, including: a device formed as a die having a conductor with ends exposed on opposite sides of the die; a first surface depression on the device, the first surface depression surrounding one of the ends of the conductor exposed at a stack side of the die; a first component over and connected to the conductor, the first component surrounded by the first surface depression; and a first underfill between and in direct contact with the first component and the device, the first underfill substantially filled to a side of an inner edge and within a perimeter of the first surface depression isolated from the conductor.
Information query
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