Invention Grant
US09053966B2 Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels
有权
具有对准（100）NMOS和（110）PMOS finFET侧壁通道的集成电路
- Patent Title: Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels
- Patent Title (中): 具有对准（100）NMOS和（110）PMOS finFET侧壁通道的集成电路
-
Application No.: US14499834Application Date: 2014-09-29
-
Publication No.: US09053966B2Publication Date: 2015-06-09
- Inventor: Weize W. Xiong , Cloves R. Cleavelin , Angelo Pinto , Rick L. Wise
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frank Cimino
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/088 ; G11C11/412 ; H01L21/8238 ; H01L27/02 ; H01L27/11 ; H01L27/092 ; H01L29/04
Abstract:
An integrated circuit device that includes a plurality of multiple gate FinFETs (MuGFETs) is disclosed. Fins of different crystal orientations for PMOS and NMOS MuGFETs are formed through amorphization and crystal regrowth on a direct silicon bonded (DSB) hybrid orientation technology (HOT) substrate. PMOS MuGFET fins are formed with channels defined by fin sidewall surfaces having (110) crystal orientations. NMOS MuGFET fins are formed with channels defined by fin sidewall surfaces having (100) crystal orienations in a Manhattan layout with the sidewall channels of the different PMOS and NMOS MuGFETs aligned at 0° or 90° rotations.
Public/Granted literature
- US20150014789A1 INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET SIDEWALL CHANNELS Public/Granted day:2015-01-15
Information query
IPC分类:
