Invention Grant
- Patent Title: Manufacturing method of substrate for a semiconductor package, manufacturing method of semiconductor package, substrate for a semiconductor package and semiconductor package
- Patent Title (中): 用于半导体封装的衬底的制造方法，半导体封装的制造方法，半导体封装的衬底和半导体封装
-
Application No.: US13951612Application Date: 2013-07-26
-
Publication No.: US09054116B2Publication Date: 2015-06-09
- Inventor: Yoichiro Hamada , Shigeru Hosomomi
- Applicant: Yoichiro Hamada , Shigeru Hosomomi
- Applicant Address: JP Tokyo
- Assignee: SH MATERIALS CO., LTD.
- Current Assignee: SH MATERIALS CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Locke Lord LLP
- Priority: JP2009-038563 20090220; JP2010-000305 20100105
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/56 ; H01L21/48 ; H01L21/683 ; H01L23/498 ; H01L23/00 ; H01L23/31
Abstract:
A manufacturing method of a substrate for a semiconductor package includes a resist layer forming step to form a resist layer on a surface of a conductive substrate; an exposure step to expose the resist layer using a glass mask with a mask pattern including a transmission area, a light shielding area, and an intermediate transmission area, wherein transmittance of the intermediate transmission area is lower than that of the transmission area and is higher than that of the light shielding area; a development step to form a resist pattern including a hollow with a side shape including a slope part decreasing in hollow circumference as the hollow circumference approaches the substrate; and a plating step to plate on an exposed area to form a metal layer with a side shape including a slope part decreasing in circumference as the circumference approaches the substrate.
Public/Granted literature
Information query
IPC分类:
