Invention Grant
US09054681B2 High speed duty cycle correction and double to single ended conversion circuit for PLL
有权
PLL的高速占空比校正和双端到单端转换电路
- Patent Title: High speed duty cycle correction and double to single ended conversion circuit for PLL
- Patent Title (中): PLL的高速占空比校正和双端到单端转换电路
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Application No.: US13522745Application Date: 2011-08-23
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Publication No.: US09054681B2Publication Date: 2015-06-09
- Inventor: Youhua Wang , Junan Zhang , Dongbing Fu , Gangyi Hu , Jun Liu , Ruzhang Li , Guangbing Chen
- Applicant: Youhua Wang , Junan Zhang , Dongbing Fu , Gangyi Hu , Jun Liu , Ruzhang Li , Guangbing Chen
- Applicant Address: CN Nan'an District, Chongqing
- Assignee: China Electronic Technology Corporation, 24th Research Institute
- Current Assignee: China Electronic Technology Corporation, 24th Research Institute
- Current Assignee Address: CN Nan'an District, Chongqing
- Agency: Merchant & Gould P.C.
- Priority: CN201110232848 20110815
- International Application: PCT/CN2011/078759 WO 20110823
- International Announcement: WO2013/023385 WO 20130221
- Main IPC: H03K3/017
- IPC: H03K3/017 ; H03K5/04 ; H03K7/08 ; H03K5/06 ; H03K5/156
Abstract:
The present invention pertains to a high speed duty cycle correction and double to single ended conversion circuit for PLL, comprising a reshaper stage, a single-edge detection circuit and a duty cycle restorer. The present invention introduces a way to convert double-ended output of PLL VCO into single-ended signal and adjust duty cycle of PLL VCO's output waveform by 50%, so that the circuit can output single ended clock signal with 50% duty cycle.
Public/Granted literature
- US20130257499A1 HIGH SPEED DUTY CYCLE CORRECTION AND DOUBLE TO SINGLE ENDED CONVERSION CIRCUIT FOR PLL Public/Granted day:2013-10-03
Information query
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