Invention Grant
- Patent Title: Package substrate, method of manufacturing the package substrate and semiconductor package including the package substrate
- Patent Title (中): 封装衬底,制造封装衬底的方法和包括封装衬底的半导体封装
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Application No.: US14194647Application Date: 2014-02-28
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Publication No.: US09072188B2Publication Date: 2015-06-30
- Inventor: Tae-Young Yoon
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR
- Agency: Renaissance IP Law Group LLP
- Priority: KR10-2013-0022668 20130304
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K3/24 ; H01L25/065 ; H01L23/48 ; H01L23/498 ; H01L23/538 ; H01L23/31 ; H01L23/00

Abstract:
A package substrate may include an insulating substrate, a first land array, a second land array, a first plating line and a second plating line. The first land array may be arranged on a first surface of the insulating substrate. The second land array may be arranged on a second surface of the insulating substrate opposite to the first surface. The second land array may be electrically connected to the first land array. The second land array may include outer lands and inner lands. The first plating line may be connected to the outer lands. The second plating line may be connected between the outer lands and the inner lands. The second plating line may have a width narrower than that of the first plating line. The second plating line may be removed by applying a removing current to the first plating line prior to the first plating line.
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