Invention Grant
- Patent Title: Generalized modular redundancy fault tolerance method for combinational circuits
- Patent Title (中): 用于组合电路的广义模块化冗余容错方法
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Application No.: US14047869Application Date: 2013-10-07
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Publication No.: US09075111B2Publication Date: 2015-07-07
- Inventor: Aiman Helmi El-Maleh , Feras M. Chikh Oughali
- Applicant: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
- Applicant Address: SA Dhahran
- Assignee: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
- Current Assignee: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
- Current Assignee Address: SA Dhahran
- Agent Richard C Litman
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3177 ; G01R31/3183
Abstract:
A fault tolerance method for combinational circuits is provided. In order to increase reliability of combinational circuits, extra redundant modules are added to the circuit logic. The method further utilizes redundancy techniques to improve soft error reliability, and is based on probability of occurrence for combinations at the outputs of circuits, thus enhancing the reliability of the combinational circuits.
Public/Granted literature
- US20150100839A1 GENERALIZED MODULAR REDUNDANCY FAULT TOLERANCE METHOD FOR COMBINATIONAL CIRCUITS Public/Granted day:2015-04-09
Information query
