Invention Grant
US09075666B2 Deferred execution in a multi-thread safe system level modeling simulation
有权
延迟执行在多线程安全系统级建模仿真中
- Patent Title: Deferred execution in a multi-thread safe system level modeling simulation
- Patent Title (中): 延迟执行在多线程安全系统级建模仿真中
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Application No.: US13971026Application Date: 2013-08-20
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Publication No.: US09075666B2Publication Date: 2015-07-07
- Inventor: Jan M. J. Janssen , Thorsten H. Grötker , Christoph Schumacher , Rainer Leupers
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fenwick & West LLP
- Main IPC: G06F9/46
- IPC: G06F9/46 ; G06F9/52 ; G06F9/50 ; G06F9/48

Abstract:
Methods, systems, and machine readable medium for multi-thread safe system level modeling simulation (SLMS) of a target system on a host system. An example of a SLMS is a SYSTEMC simulation. During the SLMS, SLMS processes are executed in parallel via a plurality of threads. SLMS processes represent functional behaviors of components within the target system, such as functional behaviors of processor cores. Deferred execution may be used to defer execution of operations of SLMS processes that access a shared resource. Multi-thread safe direct memory interface (DMI) access may be used by a SLMS process to access a region of the memory in a multi-thread safe manner. Access to regions of the memory may also be guarded if they are at risk of being in a transient state when being accessed by more than one SLMS process.
Public/Granted literature
- US20150058859A1 Deferred Execution in a Multi-thread Safe System Level Modeling Simulation Public/Granted day:2015-02-26
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