Invention Grant
- Patent Title: Non-volatile semiconductor memory device and memory system
- Patent Title (中): 非易失性半导体存储器件和存储器系统
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Application No.: US14093108Application Date: 2013-11-29
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Publication No.: US09076536B2Publication Date: 2015-07-07
- Inventor: Yasushi Nagadomi
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-155396 20110714
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/14 ; G11C11/56 ; G11C16/06 ; G11C16/10

Abstract:
A non-volatile semiconductor memory device includes a memory cell array and a control circuit. A control circuit performs an erase operation providing a memory cell with a first threshold voltage level for erasing data of a memory cell, and then perform a plurality of first write operations providing a memory cell with a second threshold voltage level, the second threshold voltage level being higher than the first threshold voltage level and being positive level. When the control circuit receives a first execution instruction from outside during the first write operations, the first execution instruction being for performing first function operation except for the erase operation and the first write operations, the circuit performs the first function operation during the first write operations.
Public/Granted literature
- US20140085990A1 VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM Public/Granted day:2014-03-27
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