Invention Grant
- Patent Title: Memory test system and memory test method
- Patent Title (中): 内存测试系统和内存测试方法
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Application No.: US13666934Application Date: 2012-11-01
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Publication No.: US09076558B2Publication Date: 2015-07-07
- Inventor: Wen-Chang Cheng
- Applicant: Wen-Chang Cheng
- Applicant Address: TW Taoyuan
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW Taoyuan
- Agency: Jianq Chyun IP Office
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/56

Abstract:
A memory test system and a memory test method are provided. The memory test system includes a control unit, a data reading channel, a data writing channel and a test channel. The control unit generates and outputs a first read and a first write command. The data reading channel and the data writing channel coupled to the memory unit, and the control unit respectively reads data from the memory unit at a first time and writes the data back to the memory unit at a second time according to the first read command and the first write command. The test channel receives the data from the data reading channel through an input end and outputs the data back to the data writing channel through an output end after a time delay. The time delay is substantially equal to a time interval between the first time and the second time.
Public/Granted literature
- US20140122948A1 MEMORY TEST SYSTEM AND MEMORY TEST METHOD Public/Granted day:2014-05-01
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