A 3D memory structure and a manufacturing method of the same are provided. The 3D memory structure includes a substrate, a plurality of stacked structures, a plurality of charge trapping layers, a plurality of bit lines, and a plurality of stair structures. The stacked structures are formed on the substrate, and each of the stacked structures includes a plurality of gates and a plurality of gate insulators alternately stacked on the substrate. The charge trapping layers are formed on the sidewalls of the stacked structures. The bit lines are arranged orthogonally over the stacked structures, the surfaces of the bit lines crossing the stacked structures for forming a plurality of memory elements. The stair structures, each electrically connected to the different gates, are stacked on the substrate.