Invention Grant
- Patent Title: Method of forming interconnection structure having notches for semiconductor device
- Patent Title (中): 形成具有半导体器件凹口的互连结构的方法
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Application No.: US13936942Application Date: 2013-07-08
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Publication No.: US09076729B2Publication Date: 2015-07-07
- Inventor: Chih-Yuan Ting , Chung-Wen Wu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/283

Abstract:
A semiconductor device is disclosed. The device includes a substrate, a first dielectric layer disposed over the substrate and a metal structure disposed in the first dielectric layer and below a surface of the first dielectric layer. The metal structure has a such shape that having an upper portion with a first width and a lower portion with a second width. The second width is substantially larger than the first width. The semiconductor device also includes a sub-structure of a second dielectric positioned between the upper portion of the metal structure and the first dielectric layer.
Public/Granted literature
- US20140264873A1 Interconnection Structure And Method For Semiconductor Device Public/Granted day:2014-09-18
Information query
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