Invention Grant
- Patent Title: Method to prepare semi-conductor device comprising a selective etching of a silicium—germanium layer
- Patent Title (中): 制备半导体器件的方法包括选择性蚀刻硅 - 锗层
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Application No.: US13628318Application Date: 2012-09-27
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Publication No.: US09076732B2Publication Date: 2015-07-07
- Inventor: Yannick Le Tiec , Laurent Grenouillet , Nicolas Posseme , Maud Vinet
- Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Applicant Address: FR Paris
- Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Current Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Current Assignee Address: FR Paris
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR1158674 20110928
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461 ; H01L21/306 ; H01L21/3213 ; H01L21/8238 ; H01L21/02 ; H01L21/311 ; C09K13/00
Abstract:
The present invention relates to a method for manufacturing a semiconductor device by wet-process chemical etching, the device comprising at least one layer of silicon (Si) and at least one layer of silicon-germanium (SiGe) and at least one layer of photosensitive resin forming a mask partly covering the layer of silicon-germanium (SiGe) and leaving the layer of silicon-germanium uncovered in certain zones, characterized in that it comprises a step of preparation of an etching solution, having a pH between 3 and 6, from hydrofluoric acid (HF), hydrogen peroxide (H2O2), acetic acid (CH3COOH) and ammonia (NH4OH), and a step of stripping of the layer of silicon-germanium (SiGe) at least at the said zones by exposure to the said etching solution. The invention will be applicable for the manufacture of integrated circuits and more precisely of transistors. In particular, for optimization of CMOS transistors of the latest generation.
Public/Granted literature
- US20130109191A1 METHOD TO PREPARE SEMI-CONDUCTOR DEVICE COMPRISING A SELECTIVE ETCHING OF A SILICIUM-GERMANIUM LAYER Public/Granted day:2013-05-02
Information query
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