Invention Grant
US09076953B2 Spin transistors employing a piezoelectric layer and related memory, memory systems, and methods
有权
采用压电层和相关存储器的旋转晶体管，存储器系统和方法
- Patent Title: Spin transistors employing a piezoelectric layer and related memory, memory systems, and methods
- Patent Title (中): 采用压电层和相关存储器的旋转晶体管，存储器系统和方法
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Application No.: US13746011Application Date: 2013-01-21
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Publication No.: US09076953B2Publication Date: 2015-07-07
- Inventor: Yang Du
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Nicholas J. Pauley; Peter Michael Kamarchik; Paul Holdaway
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/84 ; H01L21/76 ; G11C11/00 ; G11C11/14 ; H01L43/02 ; H01L27/22 ; H01L43/12 ; H01L43/08
Abstract:
Spin transistors and related memory, memory systems, and methods are disclosed. A spin transistor is provided by at least two magnetic tunnel junctions (MTJs) with a shared multiferroic layer. The multiferroic layer is formed from a piezoelectric (PE) thin film over a ferromagnetic thin film (FM channel) with a metal electrode (metal). The ferromagnetic layer functions as the spin channel and the piezoelectric layer is used for transferring piezoelectric stress to control the spin state of the channel. The MTJ on one side of the shared layer forms a source and the MTJ on the other side is a drain for the spin transistor.
Public/Granted literature
- US20130299880A1 Spin Transistors Employing a Piezoelectric Layer and Related Memory, Memory Systems, and Methods Public/Granted day:2013-11-14
Information query
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