Invention Grant
- Patent Title: Receiver circuit and method for controlling receiver circuit
- Patent Title (中): 接收机电路和控制接收机电路的方法
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Application No.: US14149388Application Date: 2014-01-07
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Publication No.: US09077593B2Publication Date: 2015-07-07
- Inventor: Win Chaivipas
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: JP2013-060634 20130322
- Main IPC: H04B1/10
- IPC: H04B1/10 ; H04L27/22

Abstract:
A receiver circuit includes: a data interpolation switched capacitor circuit which samples a data signal and outputs a voltage value interpolated from a sampled voltage value in correspondence with an interpolation code indicating an interpolation ratio; a comparator which performs comparison between the voltage value outputted from the data interpolation switched capacitor circuit and a threshold value; a phase detection circuit which detects a boundary based on an output of the comparator and decides whether to advance or delay a phase; and an interpolation code generation circuit which generates an interpolation code corresponding to an output of the phase detection circuit, wherein a phase offset related to sampling is imparted and an offset corresponding to an amount of the phase offset is imparted to the threshold value of the comparator.
Public/Granted literature
- US20140286457A1 RECEIVER CIRCUIT AND METHOD FOR CONTROLLING RECEIVER CIRCUIT Public/Granted day:2014-09-25
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