Invention Grant
- Patent Title: Wiring substrate and method of manufacturing the same
- Patent Title (中): 接线基板及其制造方法
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Application No.: US13417665Application Date: 2012-03-12
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Publication No.: US09078384B2Publication Date: 2015-07-07
- Inventor: Jun Furuichi , Akihiko Tateiwa , Naoyuki Koizumi
- Applicant: Jun Furuichi , Akihiko Tateiwa , Naoyuki Koizumi
- Applicant Address: JP Nagano-shi
- Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee Address: JP Nagano-shi
- Agency: Kratz, Quintos & Hanson, LLP
- Priority: JP2011-058265 20110316
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K3/30 ; H05K3/46 ; H01L21/48 ; H05K3/20 ; H01L23/498 ; H01L23/00

Abstract:
A wiring substrate includes a structure in which a plurality of wiring layers are stacked through insulating layers intervening therebetween, and which has a first surface side and a second surface side, the first surface side where a semiconductor element is to be mounted, the second surface side being located at an opposite side to the first surface side, an interposer buried in an outermost one of the insulating layers located at the first surface side, and electrically connected to the semiconductor element to be mounted, and a sheet-shaped member buried in an outermost one of the insulating layers located at the second surface side, wherein, the interposer and the sheet-shaped member are disposed at symmetrical positions symmetrical each other.
Public/Granted literature
- US20120234589A1 WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2012-09-20
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