Invention Grant
- Patent Title: Microelectronic package with stress-tolerant solder bump pattern
- Patent Title (中): 微电子封装，具有耐应力焊料凸块图案
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Application No.: US14053450Application Date: 2013-10-14
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Publication No.: US09082674B2Publication Date: 2015-07-14
- Inventor: Leilei Zhang
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/00 ; H01L23/12 ; H01L23/498
Abstract:
A microelectronic package includes larger diameter solder bumps and smaller diameter solder bumps for coupling an interposer to a packaging substrate. The larger diameter solder bumps are positioned on a peripheral surface of the interposer and the smaller diameter solder bumps are positioned on a center surface of the interposer. The solder bumps positioned in the peripheral region can more reliably withstand the higher mechanical stresses that occur in this peripheral region during operation of the microelectronic package.
Public/Granted literature
- US20150102483A1 MICROELECTRONIC PACKAGE WITH STRESS-TOLERANT SOLDER BUMP PATTERN Public/Granted day:2015-04-16
Information query
IPC分类:
