Invention Grant
US09082784B2 Method of fabricating a semiconductor device having stacked storage nodes of capacitors in cell region separated from peripheral region
有权
制造半导体器件的方法，该半导体器件具有与周边区域分离的单元区域中的电容器的堆叠存储节点
- Patent Title: Method of fabricating a semiconductor device having stacked storage nodes of capacitors in cell region separated from peripheral region
- Patent Title (中): 制造半导体器件的方法，该半导体器件具有与周边区域分离的单元区域中的电容器的堆叠存储节点
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Application No.: US14505098Application Date: 2014-10-02
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Publication No.: US09082784B2Publication Date: 2015-07-14
- Inventor: Jun Ki Kim
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2011-0013457 20110215
- Main IPC: H01L21/338
- IPC: H01L21/338 ; H01L21/337 ; H01L49/02 ; H01L27/108 ; H01L21/768 ; H01L21/306
Abstract:
Methods of fabricating a semiconductor device are provided. The method includes forming a first mold layer on a in a cell region and a peripheral region, forming first storage nodes penetrating the first mold layer in the cell region and a first contact penetrating the first mold layer in the peripheral region, forming a second mold layer on the first mold layer, forming second storage nodes that penetrate the second mold layer to be connected to respective ones of the first storage nodes, removing the second mold layer in the cell and peripheral regions and the first mold layer in the cell region to leave the first mold layer in the peripheral region, and forming a second contact that penetrates a first interlayer insulation layer to be connected to the first contact. Related devices are also provided.
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