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US09082878B2 Method of fabricating a power semiconductor chip package 有权
制造功率半导体芯片封装的方法

Method of fabricating a power semiconductor chip package
Abstract:
A device includes a vertical power semiconductor chip having an epitaxial layer and a bulk semiconductor layer. A first contact pad is arranged on a first main face of the power semiconductor chip and a second contact pad is arranged on a second main face of the power semiconductor chip opposite to the first main face. The device further comprises an electrically conducting carrier attached to the second contact pad.
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