In an embodiment of the invention, a flip-flop circuit contains a first inverter, a pass gate, master latch, a transfer gate and a slave latch. The clock signals and retention control signals determine when the master latch is latched. The slave latch is configured to receive the output of the master latch, a second data bit D2, the clock signals, the retain control signals, the slave control signals. The clock signals, the retain control signals, and the slave control signals determine whether the output of the master latch or the second data bit D2 is latched in the slave latch. The retain control signals determine when data is stored in the slave latch during retention mode.