Invention Grant
US09085826B2 Method of fabricating printed circuit board (PCB) substrate having a cavity
有权
制造具有空腔的印刷电路板(PCB)基板的方法
- Patent Title: Method of fabricating printed circuit board (PCB) substrate having a cavity
- Patent Title (中): 制造具有空腔的印刷电路板(PCB)基板的方法
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Application No.: US14039784Application Date: 2013-09-27
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Publication No.: US09085826B2Publication Date: 2015-07-21
- Inventor: Jack Ajoian
- Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Main IPC: C23F1/02
- IPC: C23F1/02

Abstract:
A method is provided for fabricating a substrate having multiple metal layers separated by one or more dielectric layers, respectively. The method includes forming a cavity in at least one dielectric layer through an exposed portion of a top dielectric layer of the substrate, applying metal to side and bottom surfaces of the cavity, forming a pattern through a portion of the metal applied to the bottom surface of the cavity, and micro-etching the metal applied to the bottom surface of the cavity. The micro-etching extends the pattern through a remaining portion of the metal applied to the bottom surface of the cavity.
Public/Granted literature
- US20150090688A1 METHOD OF FABRICATING PRINTED CIRCUIT BOARD (PCB) SUBSTRATE HAVING A CAVITY Public/Granted day:2015-04-02
Information query
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