Invention Grant
- Patent Title: Unpacking packed data in multiple lanes
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Application No.: US12494667Application Date: 2009-06-30
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Publication No.: US09086872B2Publication Date: 2015-07-21
- Inventor: Asaf Hargil , Doron Orenstein
- Applicant: Asaf Hargil , Doron Orenstein
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Vecchia Patent Agent, LLC
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F15/76 ; G06F9/30

Abstract:
Receiving an instruction indicating first and second operands. Each of the operands having packed data elements that correspond in respective positions. A first subset of the data elements of the first operand and a first subset of the data elements of the second operand each corresponding to a first lane. A second subset of the data elements of the first operand and a second subset of the data elements of the second operand each corresponding to a second lane. Storing result, in response to instruction, including: (1) in first lane, only lowest order data elements from first subset of first operand interleaved with corresponding lowest order data elements from first subset of second operand; and (2) in second lane, only highest order data elements from second subset of first operand interleaved with corresponding highest order data elements from second subset of second operand.
Public/Granted literature
- US20100332794A1 UNPACKING PACKED DATA IN MULTIPLE LANES Public/Granted day:2010-12-30
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