Invention Grant
US09086945B2 System and method to correlate errors to a specific downstream device in a PCIe switching network
有权
将错误与PCIe交换网络中的特定下游设备相关联的系统和方法
- Patent Title: System and method to correlate errors to a specific downstream device in a PCIe switching network
- Patent Title (中): 将错误与PCIe交换网络中的特定下游设备相关联的系统和方法
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Application No.: US13224008Application Date: 2011-09-01
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Publication No.: US09086945B2Publication Date: 2015-07-21
- Inventor: Austin Bolen , Surender V. Brahmaroutu
- Applicant: Austin Bolen , Surender V. Brahmaroutu
- Applicant Address: US TX Round Rock
- Assignee: Dell Products, LP
- Current Assignee: Dell Products, LP
- Current Assignee Address: US TX Round Rock
- Agency: Larson Newman, LLP
- Main IPC: G06F13/20
- IPC: G06F13/20 ; G06F13/00
Abstract:
A Peripheral Component Interconnect-Express (PCIe) port includes a PCIe link, a pending transaction counter, and an error status register. The PCIe port operates to issue a transaction on the PCIe link, determine that an endpoint device has become uncoupled from the PCIe link after issuing the first transaction, determine that a value stored in the pending transaction counter is not equal to zero in response to determining that the endpoint device has become uncoupled, and set an error bit in the error status register in response to determining that the first value is not equal to zero.
Public/Granted literature
- US20130060987A1 System and Method to Correlate Errors to a Specific Downstream Device in a PCIe Switching Network Public/Granted day:2013-03-07
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