Invention Grant
US09087732B1 Wafer-level package device having solder bump assemblies that include an inner pillar structure
有权
具有包括内柱结构的焊料凸块组件的晶片级封装器件
- Patent Title: Wafer-level package device having solder bump assemblies that include an inner pillar structure
- Patent Title (中): 具有包括内柱结构的焊料凸块组件的晶片级封装器件
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Application No.: US14170824Application Date: 2014-02-03
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Publication No.: US09087732B1Publication Date: 2015-07-21
- Inventor: Yong L. Xu , Viren Khandekar , Yi-Sheng A. Sun , Arkadii V. Samoilov
- Applicant: Maxim Integrated Products, Inc.
- Applicant Address: US CA San Jose
- Assignee: Maxim Integrated Products, Inc.
- Current Assignee: Maxim Integrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Advent, LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/00
Abstract:
Wafer-level package (semiconductor) devices are described that have a pillar structure that extends at least partially into a solder bump to mitigate thermal stresses to the solder bump. In implementations, the wafer-level package device may comprise an integrated circuit chip having a surface and a solder bump disposed over the surface. The wafer-level package device may also include a pillar structure disposed over the surface that extends at least partially into the solder bump.
Information query
IPC分类:
