Invention Grant
US09087832B2 Warpage reduction and adhesion improvement of semiconductor die package
有权
半导体管芯封装的翘曲缩小和附着力改善
- Patent Title: Warpage reduction and adhesion improvement of semiconductor die package
- Patent Title (中): 半导体管芯封装的翘曲缩小和附着力改善
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Application No.: US13790739Application Date: 2013-03-08
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Publication No.: US09087832B2Publication Date: 2015-07-21
- Inventor: Yu-Chih Huang , Yen-Chang Hu , Ching-Wen Hsiao , Chen-Shien Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00 ; H01L21/48 ; H01L23/538

Abstract:
Various embodiments of mechanisms for forming a die package and a package on package (PoP) structure using one or more compressive dielectric layers to reduce warpage are provided. The compressive dielectric layer(s) is part of a redistribution structure of the die package and its compressive stress reduces or eliminates bowing of the die package. In addition, the one or more compressive dielectric layers improve the adhesion between redistribution structure and the materials surrounding the semiconductor die. As a result, the yield and reliability of the die package and PoP structure using the die package are improved.
Public/Granted literature
- US20140252647A1 Warpage Reduction and Adhesion Improvement of Semiconductor Die Package Public/Granted day:2014-09-11
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