Invention Grant
US09087891B2 Semiconductor device, semiconductor wafer and manufacturing method of semiconductor device
有权
半导体器件,半导体晶片和半导体器件的制造方法
- Patent Title: Semiconductor device, semiconductor wafer and manufacturing method of semiconductor device
- Patent Title (中): 半导体器件,半导体晶片和半导体器件的制造方法
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Application No.: US13618389Application Date: 2012-09-14
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Publication No.: US09087891B2Publication Date: 2015-07-21
- Inventor: Kazutaka Yoshizawa , Taiji Ema , Takuya Moriki
- Applicant: Kazutaka Yoshizawa , Taiji Ema , Takuya Moriki
- Applicant Address: JP Yokohama
- Assignee: FUJITSU SEMICONDUCTOR LIMITED
- Current Assignee: FUJITSU SEMICONDUCTOR LIMITED
- Current Assignee Address: JP Yokohama
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2011-201321 20110915; JP2012-141392 20120622
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L21/78 ; H01L21/66

Abstract:
A semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers, and a via-plug in the via-layer connecting the conductive films of the wiring layers above and below, a scribe region at an outer periphery of a chip region along an edge of the semiconductor substrate and including a pad region in the vicinity of the edge, the pad region overlapping the conductive films of the plurality of wiring layers in the plan view, the plurality of wiring layers including first second wiring layers, the conductive film of the first wiring layer includes a first conductive pattern formed over an entire surface of said pad region in a plan view, and the conductive film of the second wiring layer includes a second conductive pattern formed in a part of the pad region in a plan view.
Public/Granted literature
- US08921981B2 Semiconductor device, semiconductor wafer and manufacturing method of semiconductor device Public/Granted day:2014-12-30
Information query
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