Invention Grant
- Patent Title: Buffer layer omega gate
- Patent Title (中): 缓冲层Ω门
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Application No.: US14322017Application Date: 2014-07-02
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Publication No.: US09087903B2Publication Date: 2015-07-21
- Inventor: Yu-Lien Huang , Tung Ying Lee , Chung-Hsien Chen , Chi-Wen Liu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L29/66 ; H01L29/10

Abstract:
A device comprises insulation regions disposed in a substrate and a semiconductor fin extending above top surfaces of the insulation regions. The semiconductor fin comprises a first material. A semiconductor region comprising a second material extends from a first side of the semiconductor fin over a top of the fin to a second side of the fin. A strain buffer layer is disposed between, and contacts, the semiconductor fin and the semiconductor region. The strain buffer layer comprises an oxide, and a bottommost surface of the strain buffer layer is vertically spaced apart from the top surfaces of the insulation regions.
Public/Granted literature
- US20140319462A1 BUFFER LAYER OMEGA GATE Public/Granted day:2014-10-30
Information query
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