Invention Grant
US09088159B2 Limiting circuit for a semiconductor transistor and method for limiting the voltage across a semiconductor transistor
有权
用于半导体晶体管的限制电路和用于限制半导体晶体管两端的电压的方法
- Patent Title: Limiting circuit for a semiconductor transistor and method for limiting the voltage across a semiconductor transistor
- Patent Title (中): 用于半导体晶体管的限制电路和用于限制半导体晶体管两端的电压的方法
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Application No.: US14013475Application Date: 2013-08-29
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Publication No.: US09088159B2Publication Date: 2015-07-21
- Inventor: Thomas Peuser
- Applicant: Robert Bosch GmbH
- Applicant Address: DE Stuttgart
- Assignee: Robert Bosch GmbH
- Current Assignee: Robert Bosch GmbH
- Current Assignee Address: DE Stuttgart
- Agency: Michael Best & Friedrich LLP
- Priority: DE102012216185 20120912
- Main IPC: H03K5/08
- IPC: H03K5/08 ; H02H3/20 ; H02H7/22 ; H03K17/0812 ; H03K17/082

Abstract:
A limiting circuit for at least one semiconductor transistor. The circuit includes a limiting path which is coupled between a first power terminal and a second power terminal of the semiconductor transistor. The limiting path includes a limiting transistor. A node of the limiting path located between the limiting transistor and the second power terminal of the semiconductor transistor is coupled to a control terminal of the semiconductor transistor. A voltage source is coupled to the control terminal of the limiting transistor and is designed to apply a control voltage to said control terminal of the limiting transistor. The control voltage corresponds to a critical voltage for the voltage between the first power terminal and the second power terminal of the semiconductor transistor. The limiting transistor is switched to a conductive state when said critical voltage is exceeded at a power terminal of said limiting transistor.
Public/Granted literature
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