Invention Grant
- Patent Title: Scan chain in an integrated circuit
- Patent Title (中): 扫描链在一个集成电路中
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Application No.: US13746153Application Date: 2013-01-21
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Publication No.: US09097764B2Publication Date: 2015-08-04
- Inventor: Naishad Narendra Parikh , Pranjal Tiwari , Aishwarya Dubey
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Ronald O. Neerings; Frank D. Cimino
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3185

Abstract:
In an embodiment, a scannable storage element includes an input circuit for providing a first signal at first node based on a data input and a scan input, where the scan input is of pull-up logic in functional mode. The input circuit includes a first pull-up path comprising a switch receiving data input and a switch receiving scan enable input, and second pull-up path comprising a switch receiving scan input, first pull-down path comprising a switch receiving the scan enable input and a switch receiving the scan input, and second pull-down path comprising a switch receiving the data input. The storage element includes a shifting circuit configured to provide a second signal in response to the first signal at second node, and a scan output buffer coupled to the second node and configured to provide a scan output at a scan output terminal in response to the second signal.
Public/Granted literature
- US20140208176A1 SCAN CHAIN IN AN INTEGRATED CIRCUIT Public/Granted day:2014-07-24
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