Invention Grant
US09099337B2 Integrated circuits having negative channel metal oxide semiconductor and positive channel metal oxide semiconductor
有权
具有负沟道金属氧化物半导体和正沟道金属氧化物半导体的集成电路
- Patent Title: Integrated circuits having negative channel metal oxide semiconductor and positive channel metal oxide semiconductor
- Patent Title (中): 具有负沟道金属氧化物半导体和正沟道金属氧化物半导体的集成电路
-
Application No.: US14089840Application Date: 2013-11-26
-
Publication No.: US09099337B2Publication Date: 2015-08-04
- Inventor: Chung-Shi Liu , Chen-Hua Yu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW
- Agency: Lowe Hauptman & Ham, LLP
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L27/092 ; H01L21/8238 ; H01L21/265 ; H01L21/28 ; H01L29/49 ; H01L29/66
Abstract:
An integrated circuit includes an NMOS and a PMOS disposed over a substrate. The NMOS transistor includes a first gate dielectric structure over the substrate, a first work function metallic layer over the first gate dielectric structure, a conductive layer over the first work function metallic layer, and a silicide layer over the conductive layer. The PMOS transistor includes a second gate dielectric structure over the substrate, and a second work function metallic layer over the first gate dielectric structure. The PMOS transistor is devoid of any silicide material on the second work function metallic layer.
Public/Granted literature
- US20140077309A1 INTEGRATED CIRCUITS INCLUDING METALLIC GATE LAYERS Public/Granted day:2014-03-20
Information query
IPC分类:
