Invention Grant
- Patent Title: Electronic fuse vias in interconnect structures
- Patent Title (中): 互连结构中的电子熔丝通孔
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Application No.: US14494833Application Date: 2014-09-24
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Publication No.: US09099468B2Publication Date: 2015-08-04
- Inventor: Junjing Bao , Griselda Bonilla , Samuel S. Choi , Daniel C. Edelstein , Ronald G. Filippi , Naftali Eliahu Lustig , Andrew H. Simon
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent L. Jeffrey Kelly; Catherine Ivers
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/525 ; H01L21/768 ; H01L23/522 ; H01L23/532

Abstract:
An electronic fuse and method for forming the same. Embodiments of the invention include e-fuses having a first metallization level including a metal structure, a second metallization level above the first metallization level, a metal via in the second metallization level, an interface region where the metal via meets the first metallization level, and a damaged region at the interface region. Embodiments further include a method including providing a first metallization level including a metal structure, forming a capping layer on the first metallization level, forming an opening in the capping layer that exposes a portion of the metal structure; forming above the capping layer an adhesion layer contacting the metal structure, forming an insulating layer above the adhesion layer, etching the insulating layer and the adhesion layer to form a recess exposing the metal structure, and filling the fuse via recess to form a fuse via.
Public/Granted literature
- US20150041951A1 ELECTRONIC FUSE VIAS IN INTERCONNECT STRUCTURES Public/Granted day:2015-02-12
Information query
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