Invention Grant
- Patent Title: Method of forming patterns for semiconductor device
- Patent Title (中): 形成半导体器件图案的方法
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Application No.: US14208456Application Date: 2014-03-13
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Publication No.: US09099470B2Publication Date: 2015-08-04
- Inventor: Young-Ho Lee , Jae-Hwang Sim , Sang-Yong Park , Kyung-Lyul Moon
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Onello & Mello, LLP.
- Priority: KR10-2009-0017156 20090227
- Main IPC: H01L21/033
- IPC: H01L21/033 ; H01L23/528 ; H01L21/308 ; H01L21/311 ; H01L21/762 ; H01L27/115 ; H01L21/768 ; H01L27/108

Abstract:
Provided is a method of forming patterns for a semiconductor device in which fine patterns and large-width patterns are formed simultaneously and adjacent to each other. In the method, a first layer is formed on a substrate so as to cover a first region and a second region which are included in the substrate. Both a blocking pattern covering a portion of the first layer in the first region and a low-density large-width pattern covering a portion of the first layer in the second region are simultaneously formed. A plurality of sacrificial mask patterns are formed on the first layer and the blocking pattern in the first region. A plurality of spacers covering exposed sidewalls of the plurality of sacrificial mask patterns are formed. The plurality of sacrificial mask patterns are removed. The first layer in the first and second regions are simultaneously etched by using the plurality of spacers and the blocking pattern as etch masks in the first region and using the low-density large-width pattern as an etch mask in the second region.
Public/Granted literature
- US20140191405A1 METHOD OF FORMING PATTERNS FOR SEMICONDUCTOR DEVICE Public/Granted day:2014-07-10
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