Invention Grant
- Patent Title: Three-dimensional integrated circuit having stabilization structure for power supply voltage, and method for manufacturing same
- Patent Title (中): 具有用于电源电压的稳定结构的三维集成电路及其制造方法
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Application No.: US14232024Application Date: 2013-04-10
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Publication No.: US09099477B2Publication Date: 2015-08-04
- Inventor: Takashi Morimoto
- Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Applicant Address: JP Osaka
- Assignee: Panasonic Intellectual Property Management Co., Ltd.
- Current Assignee: Panasonic Intellectual Property Management Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2012-108637 20120510
- International Application: PCT/JP2013/002446 WO 20130410
- International Announcement: WO2013/168354 WO 20131114
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/538 ; H01L49/02 ; H01L23/522 ; H01L23/528 ; H01L21/822 ; H01L27/06 ; H01L25/00 ; H01L25/065 ; H01L23/64
Abstract:
The three-dimensional integrated circuit has a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip, wherein each of the first semiconductor chip and the second semiconductor chip is provided with a power supply wiring layer which has a wiring pattern structure for stably supplying a power supply voltage to an internal circuit of the semiconductor chip, and a ground wiring layer in succession, and one of the first semiconductor chip and the second semiconductor chip further includes a second ground wiring layer or a second power supply wiring layer on a surface facing to the other semiconductor chip.
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