Invention Grant
US09099565B2 Method of making a semiconductor device using trench isolation regions to maintain channel stress
有权
使用沟槽隔离区域制造半导体器件以维持沟道应力的方法
- Patent Title: Method of making a semiconductor device using trench isolation regions to maintain channel stress
- Patent Title (中): 使用沟槽隔离区域制造半导体器件以维持沟道应力的方法
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Application No.: US14048282Application Date: 2013-10-08
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Publication No.: US09099565B2Publication Date: 2015-08-04
- Inventor: Qing Liu , Nicolas Loubet
- Applicant: STMicroelectronics, Inc.
- Applicant Address: US TX Coppell
- Assignee: STMICROELECTRONICS, INC.
- Current Assignee: STMICROELECTRONICS, INC.
- Current Assignee Address: US TX Coppell
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84 ; H01L21/8238 ; H01L27/092 ; H01L27/12

Abstract:
A method for forming a complementary metal oxide semiconductor (CMOS) semiconductor device includes forming laterally adjacent first and second active regions in a semiconductor layer of a silicon-on-insulator (SOI) wafer. A stress inducing layer is formed above the first active region to impart stress thereto. Trench isolation regions are formed bounding the first active region and adjacent portions of the stress inducing layer. The stress inducing layer is removed leaving the trench isolation regions to maintain stress imparted to the first active region.
Public/Granted literature
- US20150099335A1 METHOD OF MAKING A SEMICONDUCTOR DEVICE USING TRENCH ISOLATION REGIONS TO MAINTAIN CHANNEL STRESS Public/Granted day:2015-04-09
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