Invention Grant
US09099966B2 Dual time alignment architecture for transmitters using EER/ET amplifiers and others
有权
使用EER / ET放大器和其他发射机的双时间对准架构
- Patent Title: Dual time alignment architecture for transmitters using EER/ET amplifiers and others
- Patent Title (中): 使用EER / ET放大器和其他发射机的双时间对准架构
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Application No.: US13091551Application Date: 2011-04-21
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Publication No.: US09099966B2Publication Date: 2015-08-04
- Inventor: Khalil C. Haddad
- Applicant: Khalil C. Haddad
- Applicant Address: KR Suwon-Si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-Si
- Main IPC: H01Q11/12
- IPC: H01Q11/12 ; H03F3/24 ; H03F1/30 ; H03F1/32 ; H03F3/195
Abstract:
An apparatus and method linearize a power amplifier in a transmitter by using a dual time alignment scheme. A first adjustable time delay unit delays a modulator signal input of a power amplifier. A first time delay estimator estimates a time delay between the delayed feedback signal and the reference signal, and adjusts the first adjustable time delay unit based on the estimated time delay between the delayed feedback signal and the reference signal. A second adjustable time delay unit delays the feedback signal. And a second time delay estimator estimates the time delay between the delayed feedback signal and the reference signal, and adjusts the second adjustable time delay unit based on the estimated time delay between the delayed feedback signal and the reference signal.
Public/Granted literature
- US20110260790A1 DUAL TIME ALIGNMENT ARCHITECTURE FOR TRANSMITTERS USING EER/ET AMPLIFIERS AND OTHERS Public/Granted day:2011-10-27
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