Invention Grant
- Patent Title: Method of calibrating a slicer in a receiver or the like
- Patent Title (中): 在接收机等中校准限幅器的方法
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Application No.: US14036493Application Date: 2013-09-25
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Publication No.: US09100229B2Publication Date: 2015-08-04
- Inventor: Tai Jing , Hairong Gao
- Applicant: LSI Corporation
- Applicant Address: SG Singapore
- Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
- Current Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Sheridan Ross P.C.
- Main IPC: H04L25/06
- IPC: H04L25/06 ; H04L25/03

Abstract:
A method of calibrating data slicer-latches in a receiver to remove offset errors in the slicer-latches. A known voltage is applied to all but one of the inputs of the slicer-latch. The remaining input receives an offset cancelation voltage from a DAC is stepped upward from a minimum voltage until the slicer-latch output transitions by incrementing a codeword to the DAC and the codeword that resulted the transition is saved. Then the offset cancelation voltage is swept downward in steps from a maximum voltage until the slicer-latch output transitions and the codeword that caused the transition is averaged with the stored codeword. The average of the codewords is applied to the DAC to generate the offset cancelation voltage used during normal operation of the receiver.
Public/Granted literature
- US20150085957A1 Method Of Calibrating a Slicer In a Receiver Or the Like Public/Granted day:2015-03-26
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